Vision System Implementation Based On Smart Retina

• doi: 10.1109/ICSENS.2003.1279121
• title: Vision system implementation based on smart retina
• publisher: IEEE
• isbn: 0-7803-8133-5
• issn:
• partnum: 03CH37498
• rank: 3980
• access_type: LOCKED
• content_type: Conferences
• abstract: This paper discusses the architecture and implementation of a Smart Integrated Retina based vision system dedicated for intelligent vehicles applications. The Retina is a circuit that combines image acquisition and analog processing elements allowing the achievement of realtime image processing with high efficiency in terms of speed and power consumption. In the current version, an external processor is used to control the data flow image processing. This will enable us to evaluate the performance needed and the implementation of such a processor in the same integrated circuit. This architecture will exploit in an optimal way the capabilities of the retina. The approach is compared with state-of-the-art vision chips build using digital SIMD arrays and vision systems using CMOS sensors combined with FPGA technology. As a test bench, an advanced algorithm for an exposure time calibration is presented with experimental results.
• article_number: 1279121
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1279121
• html_url: https://ieeexplore.ieee.org/document/1279121/
• abstract_url: https://ieeexplore.ieee.org/document/1279121/
• publication_title: SENSORS, 2003 IEEE
• conference_location: Toronto, ON, Canada
• conference_dates: 22-24 Oct. 2003
• publication_number: 8998
• is_number: 28562
• publication_year: 2003
• publication_date: 22-24 Oct. 2003
• start_page: 1130
• end_page: 1135 Vol.2
• citing_paper_count: 2
• citing_patent_count: 0
• download_count: 85
• insert_date: 20040405
• index_terms:
  • ieee_terms:
    • Machine vision
    • Retina
    • Sensor arrays
    • Image processing
    • Intelligent vehicles
    • Circuits
    • Energy consumption
    • Sensor systems
    • Field programmable gate arrays
    • CMOS technology
  • dynamic_index_terms:
    • Visual System
    • Exposure Time
    • Image Processing
    • Power Consumption
    • Integrated Circuit
    • Test Bench
    • Application Of Intelligence
    • Intelligent Vehicles
    • Low Consumption
    • Processing Speed
    • Psychomotor Speed
    • Processing Unit
    • Focal Plane
    • Back Focal Plane
    • Analog-to-digital Converter
    • Analog-to-digital
    • Digital-to-analog Converter
    • Image Sensor
    • Camera Sensor
    • Edge Detection
    • Luminosity
    • Spatial Filter
    • Image Processing Algorithms
    • Low-level Processing
    • Lower-level Processes
    • Pixel Array
    • Group Of Pixels
    • Processing Circuit
• isbn_formats:
  • format: Print ISBN, value: 0-7803-8133-5, isbnType: Historical
• authors:
  • Author Name: A. Elouardi
    Affiliation: Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
    Author URL: https://ieeexplore.ieee.org/author/37274753600
    ID: 37274753600
    Order: 1
    Author Affiliations:
    • Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
  • Author Name: S. Bouaziz
    Affiliation: Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
    Author URL: https://ieeexplore.ieee.org/author/37274754800
    ID: 37274754800
    Order: 2
    Author Affiliations:
    • Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
  • Author Name: A. Dupret
    Affiliation: Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
    Author URL: https://ieeexplore.ieee.org/author/38330912600
    ID: 38330912600
    Order: 3
    Author Affiliations:
    • Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
  • Author Name: J.O. Klein
    Affiliation: Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
    Author URL: https://ieeexplore.ieee.org/author/37276514100
    ID: 37276514100
    Order: 4
    Author Affiliations:
    • Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
  • Author Name: R. Reynaud
    Affiliation: Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France
    Author URL: https://ieeexplore.ieee.org/author/37274759500
    ID: 37274759500
    Order: 5
    Author Affiliations:
    • Institut d'Electronique Fondamentale, Universite Paris Sud, Orsay, France

Image Sensor

• sensor_type: CMOS/APS Sensors
• resolution: up to 256x256 pixels
• dynamic_range: Not specified
• pixel_size: Not specified
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

• frame_rate: video rate
• power_consumption: low consumption

Applications & Benefits

• cell_imaging: Used in image acquisition and low-level image processing for intelligent vehicles applications.
• benefits: Integration of processing elements and sensors in a single chip leads to reduced energy consumption and enhanced processing speed.

Supporting Organizations

• supported_by: Institut d’Electronique Fondamentale, Universite Paris Sud, Orsay, France

Manuscript Details

• publication_date: 22-24 Oct. 2003

Relevancy Score

• score: 9
• missing_fields:
  • dynamic_range
  • shutter_speed
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • dark_current
  • sensitivity
  • signal_to_noise_ratio
  • noise

Processed JSON Filename

request_9f562d7d-f7d3-457f-9e0e-7f54d98cb4bd-vision_system_implementation_based_on_smart_retina.json