Temporary Bonding And Debonding Enabling Tsv Formation And 3D Integration For Ultrathin Wafers

• doi: 10.1109/EPTC.2008.4763610
• title: Temporary Bonding and DeBonding Enabling TSV Formation and 3D Integration for Ultra-thin Wafers
• publisher: IEEE
• isbn: 978-1-4244-2118-3
• issn:
• partnum: 08EX2233
• rank: 3751
• access_type: LOCKED
• content_type: Conferences
• abstract: As the microelectronics industry promotes emerging and future applications, new and improved methods will be necessary to meet the manufacturing challenges associated with new products and processes. Emerging products and applications such as heterogeneous integrated chips (3D, TSV-through silicon via), radio-frequency identification tags, ever denser memory devices along with the advent of new advanced packaging technologies for a variety of products ranging from logic to memory to image sensors (CIS) require increasingly thinner substrates. While thin (<100 mum) silicon wafers exhibit increased flexibility, which in some cases is actually desired, such wafers also exhibit increased instability and fragility. The increased degree of fragility becomes even more pronounced in compound semiconductor wafers because of the mechanical properties of the constituent materials. The lack of mechanical stability and the increased fragility present a major challenge to maintaining high yield levels in volume manufacturing environments. A reliable support and handling solution is needed to overcome the above-mentioned challenges while maintaining yield levels compatible with low-cost, high-yield manufacturing processes. The solution of choice must enable safe, reliable handling of the substrates through back-thinning and backside processing while being compatible with existing (already installed) equipment lines and manufacturing processes. The most promising and most widely investigated handling solution for UltraThinreg wafers is the use of temporary bonding and debonding techniques utilizing a rigid carrier wafer to provide sufficient mechanical support. Once the product wafer is temporarily bonded to the carrier wafer, it is ready for backside processing including back-thinning, through-silicon via formation, etc. The product wafers can either be pre-processed wafers with CMOS devices as well as e.g. substrates with high-topographies like solder-balls. After completion of the backside processing steps, the product wafer can be released from the carrier wafer and proceed to final packaging processes. This paper will discuss and describe the temporary bonding process step technology, including spin/spray coating process to apply the high performance BrewerScience intermediate adhesive and the subsequent bonding step in detail. The EVG850TB (temporary bonding) equipment and the related process modules to cover this process are explained in addition. Furthermore, backside-processes (like e.g. thinning, backside metallization,.etc) which are typically applied after bonding to form e.g. TSV (through silicon via's) and the corresponding process performance are described. Once the original bonded waferstack went successfully through the backside process steps, debonding will be performed. DeBonding, in this case means, that first the thin wafer is getting debonded via thermally activated slide lift-off approach from the carrier wafer, cleaned in a single wafer cleaning chamber in order to remove the remaining adhesive residuals and than transferred to the dedicated output format. Output formats typically are either filmframe carriers, dedicated wafer cassettes, coin stack packing canisters or e.g. single wafer carriers. The carrier wafer is also getting cleaned and can then be reused again immediately for another bond-process. The EVG850DB (debonding bonding) equipment and the related process modules to cover this process are explained in detail. The paper will conclude with a discussion and comparison of silicon and glass carriers used for temporary bonding with respect to process integration and CoO.
• article_number: 4763610
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4763610
• html_url: https://ieeexplore.ieee.org/document/4763610/
• abstract_url: https://ieeexplore.ieee.org/document/4763610/
• publication_title: 2008 10th Electronics Packaging Technology Conference
• conference_location: Singapore
• conference_dates: 9-12 Dec. 2008
• publication_number: 4753888
• is_number: 4763398
• publication_year: 2008
• publication_date: 9-12 Dec. 2008
• start_page: 1301
• end_page: 1305
• citing_paper_count: 39
• citing_patent_count: 6
• download_count: 1577
• insert_date: 20090127
• index_terms:
  • ieee_terms:
    • Wafer bonding
    • Through-silicon vias
    • Silicon
    • Manufacturing processes
    • Substrates
    • Packaging
    • Maintenance
    • Microelectronics
    • Manufacturing industries
    • Radio frequency
  • dynamic_index_terms:
    • Enablers
    • 3D Integration
    • Through Silicon Via
    • Thinning
    • Underweight
    • Processing Steps
    • Radio Frequency Identification
    • RFID
    • Output Format
    • Radio Frequency Identification Tags
    • Manufacturing Environment
    • Choice Of Solution
    • Chamber In Order
    • Thermal Conductivity
    • Heat Conduction
    • Thermal Properties
    • Spin-coated
    • Thermal Expansion
    • Coefficient Of Thermal Expansion
    • Individual Processes
    • IR Light
• isbn_formats:
  • format: CD, value: 978-1-4244-2118-3, isbnType: New-2005
  • format: Print ISBN, value: 978-1-4244-2117-6, isbnType: New-2005
• authors:
  • Author Name: Stefan Pargfrieder
    Affiliation: EV Group, Austria
    Author URL: https://ieeexplore.ieee.org/author/37697981100
    ID: 37697981100
    Order: 1
    Author Affiliations:
    • EV Group, Austria
  • Author Name: Paul Kettner
    Affiliation: EV Group, Austria
    Author URL: https://ieeexplore.ieee.org/author/37401777600
    ID: 37401777600
    Order: 2
    Author Affiliations:
    • EV Group, Austria
  • Author Name: Mark Privett
    Affiliation: Brewer Sciences, Inc., Rolla, MO, USA
    Author URL: https://ieeexplore.ieee.org/author/37938955800
    ID: 37938955800
    Order: 3
    Author Affiliations:
    • Brewer Sciences, Inc., Rolla, MO, USA
  • Author Name: Jack Ting
    Affiliation: Brewer Sciences, Inc., Rolla, MO, USA
    Author URL: https://ieeexplore.ieee.org/author/38187139700
    ID: 38187139700
    Order: 4
    Author Affiliations:
    • Brewer Sciences, Inc., Rolla, MO, USA

Image Sensor

• sensor_type: CMOS
• resolution: Not specified
• dynamic_range: Not specified
• pixel_size: Not specified
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

Applications & Benefits

• cell_imaging: Not specified
• benefits: Not specified

Supporting Organizations

• supported_by: Not specified

Manuscript Details

• publication_date: 9-12 Dec. 2008

Relevancy Score

• score: 5
• missing_fields:
  • resolution
  • dynamic_range
  • pixel_size
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • frame_rate
  • sensitivity
  • shutter_speed
  • power_consumption
  • noise
  • cell_imaging
  • benefits
  • supported_by

Processed JSON Filename

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