Sar Adc With Openloop Integrator Using Dynamic Amplifier

• doi: 10.1109/ASICON.2017.8252402
• title: SAR+ΔΣ ADC with open-loop integrator using dynamic amplifier
• publisher: IEEE
• isbn: 978-1-5090-6626-1
• issn:
• rank: 3482
• access_type: LOCKED
• content_type: Conferences
• abstract: This paper proposes a SAR+ΔΣ ADC with open-loop integrators using dynamic amplifiers for low power, high speed, and low noise sensing systems. The integrator uses an open-loop architecture and an amplifier using a dynamic amplifier to realize high speed and low power complete integration. Two prototype ADCs have been developed for general purpose sensing systems and for CMOS Image sensors. High dynamic range of 84 dB and high Schreier's FoM of 173 dB has been achieved. Furthermore, high FoMs over the 170 dB can be kept in wide sampling rate from 2.5 MS/s to 25 MS/s and the power dissipation can be scalable with sampling rate. The SAR+ΔΣADC for CMOS image sensor can reduce the noise down to 66 μV and realized small occupied area of 20 μm × 770 μm.
• article_number: 8252402
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8252402
• html_url: https://ieeexplore.ieee.org/document/8252402/
• abstract_url: https://ieeexplore.ieee.org/document/8252402/
• publication_title: 2017 IEEE 12th International Conference on ASIC (ASICON)
• conference_location: Guiyang, China
• conference_dates: 25-28 Oct. 2017
• publication_number: 8240668
• is_number: 8252386
• publication_year: 2017
• publication_date: 25-28 Oct. 2017
• start_page: 24
• end_page: 27
• citing_paper_count: 2
• citing_patent_count: 0
• download_count: 623
• insert_date: 20180111
• index_terms:
  • ieee_terms:
    • CMOS image sensors
    • Capacitors
    • Power demand
    • Dynamic range
    • Voltage measurement
    • Noise shaping
    • Clocks
  • dynamic_index_terms:
    • Dynamic Amplifier
    • Scalable
    • Sampling Rate
    • High Speed
    • Dynamic Range
    • Image Sensor
    • Camera Sensor
    • High Dynamic Range
    • Occupied Area
    • Power Consumption
    • Input Signal
    • Internet Of Things
    • Negative Feedback Loop
    • Supply Voltage
    • Capacity Of Samples
    • Internet Of Things Applications
    • IoT Applications
    • Most Significant Bit
    • High Bit
    • Highest Bit
    • Conversion Step
    • Voltage Noise
    • Trigger Pulse
• isbn_formats:
  • format: Print on Demand(PoD) ISBN, value: 978-1-5090-6626-1, isbnType: New-2005
  • format: CD, value: 978-1-5090-6623-0, isbnType: New-2005
  • format: Electronic ISBN, value: 978-1-5090-6625-4, isbnType: New-2005
• authors:
  • Author Name: Akira Matsuzawa
    Affiliation: Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro-ku, Tokyo, Japan
    Author URL: https://ieeexplore.ieee.org/author/37328684600
    ID: 37328684600
    Order: 1
    Author Affiliations:
    • Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro-ku, Tokyo, Japan
  • Author Name: Masaya Miyahara
    Affiliation: Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro-ku, Tokyo, Japan
    Author URL: https://ieeexplore.ieee.org/author/37407974100
    ID: 37407974100
    Order: 2
    Author Affiliations:
    • Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Meguro-ku, Tokyo, Japan

Image Sensor

• sensor_type: CMOS
• resolution: Not specified in the paper
• dynamic_range: 84 dB
• pixel_size: Not specified in the paper
• dark_current: Not specified in the paper

Optical Data

• focal_length: Not specified in the paper
• aperture: Not specified in the paper
• field_of_view: Not specified in the paper
• distortion: Not specified in the paper

Performance Metrics

• frame_rate: Not specified in the paper
• signal_to_noise_ratio: SNDR of 83.5 dB
• sensitivity: Not specified in the paper
• shutter_speed: Not specified in the paper
• power_consumption: Total power consumption was 257.8 PW with 60 PW for the analog circuit, 35.1 PW for references, and 162.7 PW for digital circuits
• noise: 66 PV in the CMOS image sensor ADC

Applications & Benefits

• cell_imaging: Not specified in the paper
• benefits: The proposed ADC architecture can play an important role in IoT applications due to ultra-low power consumption and high dynamic range.

Supporting Organizations

• supported_by: Tokyo Institute of Technology

Manuscript Details

• publication_date: 25-28 Oct. 2017

Relevancy Score

• score: 8
• missing_fields:
  • fill factor
  • quantum efficiency
  • readout speed
  • noise sources
  • analog-to-digital conversion techniques
  • design considerations

Processed JSON Filename

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