Pixellevel Deltasigma Adc With Optimized Area And Power For Verticallyintegrated Image Sensors

• doi: 10.1109/MWSCAS.2008.4616731
• title: Pixel-level delta-sigma ADC with optimized area and power for vertically-integrated image sensors
• publisher: IEEE
• isbn: 978-1-4244-2167-1
• issn: 1558-3899
• partnum: 08CH38004
• rank: 3277
• access_type: LOCKED
• content_type: Conferences
• abstract: Area and power optimization of a first-order delta-sigma analog-to-digital converter (ADC) for pixel-level data conversion is presented. The ADC is designed for use in a vertically-integrated logarithmic CMOS image sensor. A switched-capacitor modulator with minimum area has been employed. Unlike other similar structures, the decimation is performed inside the pixel to decrease its output bit rate. The proposed ADC has an area of 32 times 31 mum2 and consumes 680 nW of power to achieve 80 dB of signal-to-noise ratio with a frame rate of 50 Hz. The circuit was implemented in 0.18 mum CMOS technology with a die area of 2 mm2 and has been sent for fabrication.
• article_number: 4616731
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4616731
• html_url: https://ieeexplore.ieee.org/document/4616731/
• abstract_url: https://ieeexplore.ieee.org/document/4616731/
• publication_title: 2008 51st Midwest Symposium on Circuits and Systems
• conference_location: Knoxville, TN, USA
• conference_dates: 10-13 Aug. 2008
• publication_number: 4603800
• is_number: 4616714
• publication_year: 2008
• publication_date: 10-13 Aug. 2008
• start_page: 41
• end_page: 44
• citing_paper_count: 8
• citing_patent_count: 0
• download_count: 607
• insert_date: 20080903
• index_terms:
  • ieee_terms:
    • Pixel
    • Modulation
    • Signal to noise ratio
    • Power demand
    • Noise
    • Integrated circuit modeling
    • Quantization
  • dynamic_index_terms:
    • Image Sensor
    • Camera Sensor
    • Delta-sigma Analog-to-digital Converter
    • Signal-to-noise
    • Signal-to-noise Ratio
    • Frame Rate
    • Analog-to-digital Converter
    • Analog-to-digital
    • Digital-to-analog Converter
    • Minimum Area
    • Bitrate
    • Output Bits
    • Pixel Size
    • Power Consumption
    • Input Signal
    • Cadence
    • Quantization Error
    • Amount Of Error
    • Low Power Consumption
    • High Signal-to-noise Ratio
    • Output Of Module
    • High Dynamic Range
    • Most Significant Bit
    • High Bit
    • Highest Bit
    • Circuit Simulation
    • Quantization Noise
    • CMOS Process
    • Temporal Noise
    • Nyquist Rate
    • Nyquist Sampling Rate
    • Linear Sensor
    • First-order Structure
    • Finite Impulse Response Filter
    • Simulink
• isbn_formats:
  • format: CD, value: 978-1-4244-2167-1, isbnType: New-2005
  • format: Print ISBN, value: 978-1-4244-2166-4, isbnType: New-2005
• authors:
  • Author Name: Alireza Mahmoodi
    Affiliation: Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada
    Author URL: https://ieeexplore.ieee.org/author/37703541700
    ID: 37703541700
    Order: 1
    Author Affiliations:
    • Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada
  • Author Name: Dileepan Joseph
    Affiliation: Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada
    Author URL: https://ieeexplore.ieee.org/author/37274570400
    ID: 37274570400
    Order: 2
    Author Affiliations:
    • Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada

Image Sensor

• sensor_type: CMOS
• resolution: not specified
• dynamic_range: 160 dB
• pixel_size: not specified
• dark_current: not specified

Optical Data

• focal_length: not specified
• aperture: not specified
• field_of_view: not specified
• distortion: not specified

Performance Metrics

• frame_rate: 50 Hz
• signal_to_noise_ratio: 80 dB
• power_consumption: 680 nW

Applications & Benefits

• cell_imaging: used in a vertically-integrated logarithmic CMOS image sensor
• benefits: achieves a higher SNR with lower power consumption and smaller pixel size

Supporting Organizations

• supported_by: Natural Sciences and Engineering Research Council (NSERC) of Canada

Manuscript Details

• publication_date: 10-13 Aug. 2008

Relevancy Score

• score: 9
• missing_fields:
  • fill factor
  • quantum efficiency
  • readout speed
  • noise sources

Processed JSON Filename

request_2e2e2b5d-a84f-4580-bb26-baec91655d80-pixellevel_deltasigma_adc_with_optimized_area_and_power_for_verticallyintegrated_image_sensors.json