Physical Computing Circuit With No Clock To Establish Gaussian Pyramid Of Sift Algorithm

• doi: 10.1109/ISCAS.2015.7169082
• title: Physical computing circuit with no clock to establish Gaussian pyramid of SIFT algorithm
• publisher: IEEE
• isbn: 978-1-4799-8391-9
• issn: 2158-1525
• rank: 3254
• access_type: LOCKED
• content_type: Conferences
• abstract: Physical computing scheme of active resistor network is proposed in this paper to set up a multi-scale Gaussian filter, which is also called Gaussian Pyramid in image signal processing. The analog output signal of each image photodiode could be directly processed by the circuit topology of an active resistor network, which has been pre-designed to meet the requirement of the complicated Gaussian Pyramid in SIFT algorithm. Since it is operated with no clock, the physical computing scheme, with only setup time of the whole processing circuits, is much faster than various current digital realizations. The circuit-level simulation with 65nm CMOS technology has been carried out, which shows the energy consumption of the Gaussian Pyramid processing circuit is around 74.79pJ to filter a frame of 256 × 256 pixel image, and the circuit setting time of the processing is about 138.03ps, considering the parasitic capacitances of each nodes of the circuits. Furthermore, the presented circuit is integrated into a smart CMOS image sensor architecture. With the same processing procedure, the new method of active resistor network could achieve 1.58X speedup when compared with its counterpart of FPGA implementation, in which the column-parallel readout technology of analog-to-digital convertor is used.
• article_number: 7169082
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7169082
• html_url: https://ieeexplore.ieee.org/document/7169082/
• abstract_url: https://ieeexplore.ieee.org/document/7169082/
• publication_title: 2015 IEEE International Symposium on Circuits and Systems (ISCAS)
• conference_location: Lisbon, Portugal
• conference_dates: 24-27 May 2015
• publication_number: 7152138
• is_number: 7168553
• publication_year: 2015
• publication_date: 24-27 May 2015
• start_page: 2057
• end_page: 2060
• citing_paper_count: 5
• citing_patent_count: 0
• download_count: 220
• insert_date: 20150730
• index_terms:
  • ieee_terms:
    • Resistors
    • Feature extraction
    • Field programmable gate arrays
    • CMOS image sensors
    • Computer architecture
    • Photodetectors
    • Energy consumption
  • dynamic_index_terms:
    • Scale-invariant Feature Transform
    • Physical Computing
    • Gaussian Pyramid
    • Scale Invariant Feature Transform Algorithm
    • Energy Consumption
    • Energy Expenditure
    • Processing Time
    • Image Pixels
    • Network Topology
    • Gaussian Filter
    • Analog-to-digital Converter
    • Analog-to-digital
    • Digital-to-analog Converter
    • Processing Procedures
    • Parasitic Capacitance
    • Resistance Network
    • Model System
    • Gaussian Kernel
    • Gaussian Function
    • Image Size
    • Photodetector
    • Computer Technology
    • Computer Engineering
    • Central Node
    • Feature Detection
    • Difference Of Gaussian
    • Circuit Network
    • Gaussian Kernel Function
    • Digital Computer
    • Analog Signal
    • Parallel Signaling
    • Analog Voltage
    • Analog Circuits
    • Resource Costs
    • Part Of Algorithm
    • Energy Consumption Cost
• isbn_formats:
  • format: Electronic ISBN, value: 978-1-4799-8391-9, isbnType: New-2005
• authors:
  • Author Name: Yi Li
    Affiliation: Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
    Author URL: https://ieeexplore.ieee.org/author/37085350287
    ID: 37085350287
    Order: 1
    Author Affiliations:
    • Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
  • Author Name: Fei Qiao
    Affiliation: Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
    Author URL: https://ieeexplore.ieee.org/author/37272195200
    ID: 37272195200
    Order: 2
    Author Affiliations:
    • Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
  • Author Name: Qi Wei
    Affiliation: Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
    Author URL: https://ieeexplore.ieee.org/author/37582779500
    ID: 37582779500
    Order: 3
    Author Affiliations:
    • Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
  • Author Name: Huazhong Yang
    Affiliation: Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology
    Author URL: https://ieeexplore.ieee.org/author/37291236500
    ID: 37291236500
    Order: 4
    Author Affiliations:
    • Dept. of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology

Image Sensor

• sensor_type: CMOS
• resolution: 256x256
• dynamic_range: Not specified
• pixel_size: Not specified
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

• power_consumption: 74.79 pJ

Applications & Benefits

• cell_imaging: Enabled feature detection using SIFT algorithm in image processing.
• benefits: Faster processing speed and lower energy consumption compared to traditional FPGA methods.

Supporting Organizations

• supported_by: National Science Foundation for Young Scientists of China, National High Technology Research and Development Program of China (863 program)

Manuscript Details

• publication_date: 24-27 May 2015

Relevancy Score

• score: 8
• missing_fields:
  • fill factor
  • quantum efficiency
  • readout speed
  • noise sources
  • microlenses
  • on-chip colour filters
  • global or rolling shutters
  • backside illumination

Processed JSON Filename

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