Mipa4k A 6464 Cell Mixedmode Image Processor Array

• doi: 10.1109/ISCAS.2009.5118161
• title: MIPA4k: A 64×64 cell mixed-mode image processor array
• publisher: IEEE
• isbn: 978-1-4244-3828-0
• issn: 2158-1525
• partnum: 09CH38111
• rank: 2967
• access_type: LOCKED
• content_type: Conferences
• abstract: This paper presents the MIPA4k, a 64times64 cell mixed-mode image processor array chip. The processor cell includes an image sensor, A/D/A conversion, embedded digital and analog memories and hardware-optimized grayscale and binary processing cores. This paper presents the architecture of the processor cell and the different functional hardware. The processor has been manufactured in a 0.13 micron CMOS technology and the chip size is 5.1times4.5 mm2 with a cell area of 72times61 mum2.
• article_number: 5118161
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5118161
• html_url: https://ieeexplore.ieee.org/document/5118161/
• abstract_url: https://ieeexplore.ieee.org/document/5118161/
• publication_title: 2009 IEEE International Symposium on Circuits and Systems
• conference_location: Taipei, Taiwan
• conference_dates: 24-27 May 2009
• publication_number: 5076158
• is_number: 5117665
• publication_year: 2009
• publication_date: 24-27 May 2009
• start_page: 1927
• end_page: 1930
• citing_paper_count: 35
• citing_patent_count: 20
• download_count: 290
• insert_date: 20090626
• index_terms:
  • ieee_terms:
    • Gray-scale
    • Circuits
    • Cellular neural networks
    • Robustness
    • Image sensors
    • Hardware
    • Computer architecture
    • Image converters
    • Manufacturing processes
    • CMOS technology
  • dynamic_index_terms:
    • Processor Array
    • Image Sensor
    • Camera Sensor
    • Core Processes
    • Chip Size
    • Digital Memory
    • Parallelization
    • Parallel Computing
    • Localization Performance
    • Positive Performance
    • Local Operators
    • Focal Plane
    • Back Focal Plane
    • Local Adaptation
    • Boolean Operators
    • Binary Operation
    • Boolean Logic
    • Logic Functions
    • Logic Operations
    • Digital Control
    • Grayscale Value
    • Greyscale Values
    • Implementation Performance
    • Operational Implementation
    • Parallel Arrays
    • Fuzzy Operators
    • Vector Process
    • Vector Facility
    • Array Processor
    • Current Memory
    • Power Supply Voltage
    • Neighborhood Connectivity
    • Neighbor Connectivity
    • Static Power Consumption
    • Image Processing Operations
    • 8-connected
    • Pixel Connectivity
    • 8-connected Neighborhood
• isbn_formats:
  • format: CD, value: 978-1-4244-3828-0, isbnType: New-2005
  • format: Print ISBN, value: 978-1-4244-3827-3, isbnType: New-2005
• authors:
  • Author Name: Jonne Poikonen
    Affiliation: Department of Information Technology, University of Turku, Finland
    Author URL: https://ieeexplore.ieee.org/author/37271105400
    ID: 37271105400
    Order: 1
    Author Affiliations:
    • Department of Information Technology, University of Turku, Finland
  • Author Name: Mika Laiho
    Affiliation: Department of Information Technology, University of Turku, Finland
    Author URL: https://ieeexplore.ieee.org/author/37270811800
    ID: 37270811800
    Order: 2
    Author Affiliations:
    • Department of Information Technology, University of Turku, Finland
  • Author Name: Ari Paasio
    Affiliation: Department of Information Technology, University of Turku, Finland
    Author URL: https://ieeexplore.ieee.org/author/37270810200
    ID: 37270810200
    Order: 3
    Author Affiliations:
    • Department of Information Technology, University of Turku, Finland

Image Sensor

• sensor_type: CMOS
• resolution: 64x64 cells
• dynamic_range: Not specified
• pixel_size: 72x61 µm²
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

• frame_rate: Real-time processing at high frame rates
• power_consumption: Low static power consumption, maximum static power consumption per cell is relatively low

Applications & Benefits

• cell_imaging: The chip can be used for low-level image processing operations such as median filtering, edge detection, and locally adaptive grayscale operations.
• benefits: The chip combines efficient dedicated analog and mixed-mode signal processing circuitry with versatile I/O and in-cell storage.

Supporting Organizations

• supported_by: University of Turku, Department of Information Technology

Manuscript Details

• publication_date: 24-27 May 2009

Relevancy Score

• score: 8
• missing_fields:
  • fill factor
  • quantum efficiency
  • readout speed
  • temporal noise
  • fixed-pattern noise
  • analog-to-digital conversion techniques
  • microlenses
  • on-chip colour filters
  • global or rolling shutters
  • backside illumination

Processed JSON Filename

request_5c15fb5d-6979-4284-873b-1d8972beb8d9-mipa4k_a_6464_cell_mixedmode_image_processor_array.json