Implications Of Wafer Bonding For Advanced Logic Technology Development

• doi: 10.1109/IEDM50854.2024.10873321
• title: Implications of Wafer Bonding for Advanced Logic Technology Development
• publisher: IEEE
• isbn: 979-8-3503-6543-6
• issn: 0163-1918
• rank: 2745
• access_type: LOCKED
• content_type: Conferences
• abstract: 3DI and Heterogenous Integration (HI) have become ubiquitous over the past decade with applications in FPGAs, BSI CMOS Image Sensors, HPC GPUs and High Bandwidth Memory entering high volume production (HVM). The primary characteristics of 3DI and HI are the use of wafer or die bonding, TSVs and thinning. With these advanced packaging technologies becoming mainstream and with device scaling reaching fundamental limits, scaled packaging technologies (bonding, thinning, TSV) are now being incorporated into both BEOL and FEOL semiconductor processing to achieve higher performance, bandwidth and/or density. This presentation focuses on the challenges associated with fusion wafer bonding in advanced logic applications.
• article_number: 10873321
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10873321
• html_url: https://ieeexplore.ieee.org/document/10873321/
• abstract_url: https://ieeexplore.ieee.org/document/10873321/
• publication_title: 2024 IEEE International Electron Devices Meeting (IEDM)
• conference_location: San Francisco, CA, USA
• conference_dates: 7-11 Dec. 2024
• publication_number: 10872985
• is_number: 10872987
• publication_year: 2024
• publication_date: 7-11 Dec. 2024
• start_page: 1
• end_page: 4
• citing_paper_count: 0
• citing_patent_count: 0
• download_count: 135
• insert_date: 20250218
• index_terms:
  • ieee_terms:
    • Wafer bonding
    • Semiconductor device modeling
    • Process control
    • Distortion
    • Semiconductor process modeling
    • Logic
    • Bonding
    • Through-silicon vias
    • Three-dimensional integrated circuits
    • Surface treatment
  • dynamic_index_terms:
    • Logic Technology
    • Advanced Logic
    • Wafer Bonding
    • Thinning
    • Underweight
    • Packaging Technology
    • Heterogeneous Integration
    • Multichip Module
    • Application Of Logic
    • Bond Strength
    • Bond Energy
    • Phase Velocity
    • Phase Speed
    • Propagation Velocity
    • Propagation Speed
    • Interfacial Bond
    • Bond Quality
    • Lithography Step
• isbn_formats:
  • format: Print on Demand(PoD) ISBN, value: 979-8-3503-6543-6, isbnType: New-2005
  • format: Electronic ISBN, value: 979-8-3503-6542-9, isbnType: New-2005
• authors:
  • Author Name: S. Arkalgud
    Affiliation: TEL Technology Center, America, LLC, Albany, NY, U.S.A.
    Author URL: https://ieeexplore.ieee.org/author/37393594600
    ID: 37393594600
    Order: 1
    Author Affiliations:
    • TEL Technology Center, America, LLC, Albany, NY, U.S.A.
  • Author Name: C. Netzband
    Affiliation: TEL Technology Center, America, LLC, Albany, NY, U.S.A.
    Author URL: https://ieeexplore.ieee.org/author/37086696114
    ID: 37086696114
    Order: 2
    Author Affiliations:
    • TEL Technology Center, America, LLC, Albany, NY, U.S.A.
  • Author Name: N. Ip
    Affiliation: Tokyo Electron America, Inc., Austin, TX, U.S.A.
    Author URL: https://ieeexplore.ieee.org/author/37089450627
    ID: 37089450627
    Order: 3
    Author Affiliations:
    • Tokyo Electron America, Inc., Austin, TX, U.S.A.
  • Author Name: A. Tuchman
    Affiliation: TEL Technology Center, America, LLC, Albany, NY, U.S.A.
    Author URL: https://ieeexplore.ieee.org/author/37089935014
    ID: 37089935014
    Order: 4
    Author Affiliations:
    • TEL Technology Center, America, LLC, Albany, NY, U.S.A.
  • Author Name: Y. Kondo
    Affiliation: Tokyo Electron Kyushu Limited, Kikuchi-gun, Kumamoto, Japan
    Author URL: https://ieeexplore.ieee.org/author/37089099257
    ID: 37089099257
    Order: 5
    Author Affiliations:
    • Tokyo Electron Kyushu Limited, Kikuchi-gun, Kumamoto, Japan
  • Author Name: I. Son
    Affiliation: TEL Technology Center, America, LLC, Albany, NY, U.S.A.
    Author URL: https://ieeexplore.ieee.org/author/37089935261
    ID: 37089935261
    Order: 6
    Author Affiliations:
    • TEL Technology Center, America, LLC, Albany, NY, U.S.A.
  • Author Name: A. Raley
    Affiliation: TEL Technology Center, America, LLC, Albany, NY, U.S.A.
    Author URL: https://ieeexplore.ieee.org/author/603680259340689
    ID: 603680259340689
    Order: 7
    Author Affiliations:
    • TEL Technology Center, America, LLC, Albany, NY, U.S.A.

Image Sensor

• sensor_type: CMOS
• resolution: Not specified in the text.
• dynamic_range: Not specified in the text.
• pixel_size: Not specified in the text.
• dark_current: Not specified in the text.

Optical Data

• focal_length: Not specified in the text.
• aperture: Not specified in the text.
• field_of_view: Not specified in the text.
• distortion: Not specified in the text.

Performance Metrics

• frame_rate: Not specified in the text.
• signal_to_noise_ratio: Not specified in the text.
• sensitivity: Not specified in the text.
• shutter_speed: Not specified in the text.
• power_consumption: Not specified in the text.
• noise: Not specified in the text.

Applications & Benefits

• cell_imaging: Not specified in the text.
• benefits: Not specified in the text.

Supporting Organizations

• supported_by: Not specified in the text.

Manuscript Details

• publication_date: 7-11 Dec. 2024

Relevancy Score

• score: 5
• missing_fields:
  • resolution
  • dynamic_range
  • pixel_size
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • frame_rate
  • signal_to_noise_ratio
  • sensitivity
  • shutter_speed
  • power_consumption
  • noise
  • cell_imaging
  • benefits
  • supported_by
  • publication_date

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