Hardware Implementation Of Realtime High Performance Rcenn Based Face Recognition System

• doi: 10.1109/VLSID.2014.37
• title: Hardware Implementation of Real-Time, High Performance, RCE-NN Based Face Recognition System
• publisher: IEEE
• isbn: 978-1-4799-2513-1
• issn: 2380-6923
• rank: 2562
• access_type: LOCKED
• content_type: Conferences
• abstract: Hardware implementation of a real-time, highly accurate face recognition system (FRS) is proposed in this correspondence. Face images are acquired from a CMOS sensor camera connected to Field Programmable Gate Array (FPGA) based reconfigurable hardware board using Cam Link interface. We used contrast limited adaptive histogram equalization (CLAHE) for image contrast enhancement, discrete wavelet transform (DWT) to remove variable illumination & select appropriate subband and principal component analysis (PCA) with 35 principal components which is optimized for performance and speed. Finally, Restricted Coulomb Energy (RCE) based neural network (NN) classifier is used for face recognition. We have implemented the RCE based NN in FPGA and thus utilized the inherent parallelism effectively which is not possible with NN software implementation. The performance of our implementation is superior than face recognition software and hardware implementations, which are targeted to achieve higher recognition accuracy at faster rate using minimum computational resources. Our system recognizes a single image in real-time i.e. within 18 ms corresponding to 37 frames per second image capture. We have verified our proposed system with multiple standard face databases as well as using our own face data repository.
• article_number: 6733126
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6733126
• html_url: https://ieeexplore.ieee.org/document/6733126/
• abstract_url: https://ieeexplore.ieee.org/document/6733126/
• publication_title: 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems
• conference_location: Mumbai, India
• conference_dates: 5-9 Jan. 2014
• publication_number: 6732243
• is_number: 6733066
• publication_year: 2014
• publication_date: 5-9 Jan. 2014
• start_page: 174
• end_page: 179
• citing_paper_count: 12
• citing_patent_count: 0
• download_count: 830
• insert_date: 20140206
• index_terms:
  • ieee_terms:
    • Field programmable gate arrays
    • Face recognition
    • Face
    • Hardware
    • Principal component analysis
    • Neurons
    • Histograms
  • author_terms:
    • FRS
    • CMOS
    • FPGA
    • CamLink
    • CLAHE
    • DWT
    • PCA
    • RCE
    • NN
  • dynamic_index_terms:
    • Face Recognition
    • Hardware Implementation
    • Neural Network
    • Contrast Agent
    • Contrast Enhancement
    • Contrast Medium
    • Recognition Accuracy
    • Face Images
    • Neural Network Classifier
    • Software Implementation
    • Subband
    • Face Database
    • Adaptive Histogram Equalization
    • Neural Network Technology
    • Neural Network Software
    • Support Vector Machine
    • Matrix Elements
    • Linear Discriminant Analysis
    • Discriminant Function
    • Discriminant Function Analysis
    • Graphical User Interface
    • Graphical Interface
    • Independent Component Analysis
    • Matrix Multiplication
    • Multiple Matrices
    • Matrix-vector Multiplication
    • Multiple Matrix
    • Dot Product
    • Hardware Architecture
    • Recognition Time
    • Image Decomposition
    • Regeneration Buffer
    • Framebuffer
    • Display Memory
    • Even And Odd
    • Digital Signal Processing
    • Hardware Platform
    • Face Detection
    • Software Architecture
    • Frame Grabber
• isbn_formats:
  • format: Electronic ISBN, value: 978-1-4799-2513-1, isbnType: New-2005
• authors:
  • Author Name: Santu Sardar
    Affiliation: Defence Research & Development Organization, India
    Author URL: https://ieeexplore.ieee.org/author/37709153300
    ID: 37709153300
    Order: 1
    Author Affiliations:
    • Defence Research & Development Organization, India
  • Author Name: K. Ananda Babu
    Affiliation: Defence Research & Development Organization, India
    Author URL: https://ieeexplore.ieee.org/author/37086740587
    ID: 37086740587
    Order: 2
    Author Affiliations:
    • Defence Research & Development Organization, India

Image Sensor

• sensor_type: CMOS
• resolution: 1 Mega-Pixel
• dynamic_range: Not specified
• pixel_size: Not specified
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

• frame_rate: 37 fps

Applications & Benefits

• cell_imaging: The paper discusses applications in user authentication and face recognition systems based on CMOS image sensor technology.
• benefits: The CMOS image sensor provides a non-intrusive, economic solution for identity verification and surveillance.

Supporting Organizations

• supported_by: Defence Research & Development Organization, India

Manuscript Details

• publication_date: 5-9 Jan. 2014

Relevancy Score

• score: 8
• missing_fields:
  • dynamic_range
  • pixel_size
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • signal_to_noise_ratio
  • sensitivity
  • shutter_speed
  • power_consumption
  • noise

Processed JSON Filename

request_1076d045-b5cb-4a53-8534-c4a60907ff14-hardware_implementation_of_realtime_high_performance_rcenn_based_face_recognition_system.json