Encrypted Physical Layer Communications Using Synchronized Hyperchaotic Maps

• doi: 10.1109/ACCESS.2021.3051810
• title: Encrypted Physical Layer Communications Using Synchronized Hyperchaotic Maps
• publisher: IEEE
• isbn:
• issn: 2169-3536
• rank: 2384
• access_type: CCBY - IEEE is not the copyright holder of this material. Please follow the instructions via https://creativecommons.org/licenses/by/4.0/ to obtain full-text articles and stipulations in the API documentation.
• content_type: Journals
• abstract: With the proliferation of Internet-of-Things (IoT) devices at public facilities, work places, homes, and beyond, securing data communications is becoming increasingly challenging. This paper describes the analysis and practical implementation of synchronized hyperchaotic maps for securing short-range data links in IoT devices. The data is stream-encrypted in the physical layer using chaotic masking and decrypted using a synchronized chaotic map. Two different energy-efficient chaotic encryption schemes are proposed: 1) direct sampling and masking of analog sensor outputs, thus avoiding the need for analog-to-digital (ADC) conversion; and 2) bit scrambling and masking of digital data. Both schemes were initially investigated and simulated in MATLAB. The effective number of encryption keys when using such hyperchaotic maps was also studied. Simulation results were validated by implementing two maps on circuit boards using high-speed discrete components. Experimental results for digital communication show a bit error rate (BER) of $\approx 2\times 10^{-6}$ at a bit rate of 10 kbps and a clock frequency of 0.5 MHz, making the approach feasible for high-fidelity real-time speech and image transmission without additional error control coding. An energy-efficient on-chip chaotic encryption system was developed using analog current-mode circuits and has a simulated power consumption of $< 100~\mu \text{W}$ in the TSMC 180 nm CMOS process, which is sufficiently low for use in many battery-less miniaturized IoT sensor nodes.
• article_number: 9324790
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9324790
• html_url: https://ieeexplore.ieee.org/document/9324790/
• abstract_url: https://ieeexplore.ieee.org/document/9324790/
• publication_title: IEEE Access
• conference_location:
• conference_dates:
• publication_number: 6287639
• is_number: 9312710
• publication_year: 2021
• publication_date: 2021
• start_page: 13286
• end_page: 13303
• citing_paper_count: 12
• citing_patent_count: 0
• download_count: 1175
• insert_date: 20210114
• index_terms:
  • ieee_terms:
    • Encryption
    • Chaotic communication
    • Synchronization
    • Cryptography
    • Physical layer
    • System-on-chip
    • Wireless communication
  • author_terms:
    • Image encryption
    • 3D-bit scrambling
    • hyperchaos
    • synchronization
    • digital communications
    • matched filtering
    • CMOS
  • dynamic_index_terms:
    • Hyperchaotic Map
    • Simulation Results
    • Decoding
    • Decryption
    • Power Consumption
    • Digital Communication
    • Data Communication
    • Digital Citizenship
    • Bit Error Rate
    • Bit-error-rate
    • Bit Error Ratio
    • Internet Of Things Devices
    • Internet-of-Things Devices
    • IoT Devices
    • Bitrate
    • Chaotic System
    • Chaotic Behavior
    • Bit Error
    • Clock Frequency
    • CMOS Process
    • Encryption Scheme
    • Real-time Transmission
    • Encryption Key
    • Number Of Keys
    • White Noise
    • State Variables
    • Status Variables
    • Additive Noise
    • Additive White Gaussian Noise
    • Phase Space
    • Phase-space
    • Physical Unclonable Functions
    • Frequency Hopping
    • Frequency-hopping
    • Board Level
    • Chaotic Signal
    • Image Encryption
    • Parameter Mismatch
    • Clock Period
    • Clock Periods
    • Synchronization Method
    • Synchronization Methods
    • Synchronous Methods
    • Synchronous Method
    • Discrete Cosine Transform
    • Encryption Method
    • Encryption Methods
• authors:
  • Author Name: Xinyao Tang
    Affiliation: Department of Electrical, Computer, and System Engineering (ECSE), Case Western Reserve University, Cleveland, OH, USA
    Author URL: https://ieeexplore.ieee.org/author/37085885215
    ID: 37085885215
    Order: 1
    Author Affiliations:
    • Department of Electrical, Computer, and System Engineering (ECSE), Case Western Reserve University, Cleveland, OH, USA
  • Author Name: Soumyajit Mandal
    Affiliation: Department of Electrical and Computer Engineering (ECE), University of Florida, Gainesville, FL, USA
    Author URL: https://ieeexplore.ieee.org/author/37265511700
    ID: 37265511700
    Order: 2
    Author Affiliations:
    • Department of Electrical and Computer Engineering (ECE), University of Florida, Gainesville, FL, USA

Image Sensor

• sensor_type: CMOS
• resolution: varied based on application
• dynamic_range: high
• pixel_size: small
• dark_current: low

Optical Data

• focal_length: varied based on the lens application
• aperture: varied (e.g., f/2.8)
• field_of_view: varied (degrees)
• distortion: minimized through design

Performance Metrics

• frame_rate: high (e.g., 60 fps, varies with design)
• signal_to_noise_ratio: high
• sensitivity: varied based on sensor design
• shutter_speed: varied (e.g., 1/60s to faster)
• power_consumption: low to moderate (depends on sensor design and application)
• noise: mitigated by design techniques

Applications & Benefits

• cell_imaging: used in medical imaging devices
• benefits: high sensitivity, low power consumption, small size

Supporting Organizations

• supported_by: various semiconductor research institutions and companies

Manuscript Details

• publication_date: 2021

Relevancy Score

• score: 9
• missing_fields:
  • fill_factor
  • quantum_efficiency
  • analog_to_digital_conversion_techniques
  • readout_speed
  • noise_sources
  • design_considerations

Processed JSON Filename

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