Digital Background Calibration Technique To Mitigate Vertical Fpn In Cmos
Image Sensors
- doi: 10.1109/PRIMEAsia60757.2023.00014
-
title: Digital Background Calibration Technique to
Mitigate Vertical FPN in CMOS Image Sensors
- publisher: IEEE
- isbn: 979-8-3503-7098-0
- issn: 2159-2144
- rank: 2285
- access_type: LOCKED
- content_type: Conferences
-
abstract: A digital background calibration technique to
mitigate vertical FPN (VFPN) in CMOS image sensors is proposed in this
work. The technique takes outputs of two adjacent ADC in the column as
input to LMS filter. The filter weights are updated iteratively until
the difference in ADC outputs converges to a minimum. A prototype 10-bit
ADC with the worst-case error of 1/2 MSB is implemented and simulated in
MATLAB as a proof of concept. It is observed that the difference in ADC
outputs is converged to 5e-7 from 5e-3 using hyperparameters $\mu_{e}$
and $\mu_{w}$ equal to $2^{-12}$ and $2^{-17}$, respectively.
- article_number: 10740081
-
pdf_url:
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10740081
-
html_url:
https://ieeexplore.ieee.org/document/10740081/
-
abstract_url:
https://ieeexplore.ieee.org/document/10740081/
-
publication_title: 2023 IEEE Asia Pacific Conference On
Postgraduate Research In Microelectronics And Electronics (PRIMEAsia)
- conference_location: Hyderabad, India
- conference_dates: 19-22 Nov. 2023
- publication_number: 10740012
- is_number: 10740064
- publication_year: 2023
- publication_date: 19-22 Nov. 2023
- start_page: 20
- end_page: 22
- citing_paper_count: 0
- citing_patent_count: 0
- download_count: 41
- insert_date: 20241106
-
index_terms:
-
ieee_terms:
- Asia
- Prototypes
- CMOS image sensors
- Calibration
- Microelectronics
- MATLAB
-
dynamic_index_terms:
- Digital Calibration
- Background Calibration
- Proof Of Concept
- Iterative Convergence
- Pixel Pitch
- Mode Of Integration
-
isbn_formats:
-
format: Print on Demand(PoD) ISBN,
value: 979-8-3503-7098-0,
isbnType: New-2005
-
format: Electronic ISBN,
value: 979-8-3503-7097-3,
isbnType: New-2005
-
authors:
-
Author Name: Bibhudutta Satapathy
Affiliation: Department of Electrical Engineering,
IIT, Jodhpur, India
Author URL:
https://ieeexplore.ieee.org/author/37088900521
ID: 37088900521
Order: 1
Author Affiliations:
- Department of Electrical Engineering, IIT, Jodhpur, India
-
Author Name: Pratham Chaurasia
Affiliation: Department of Electrical Engineering,
IIT, Jodhpur, India
Author URL:
https://ieeexplore.ieee.org/author/929870844067735
ID: 929870844067735
Order: 2
Author Affiliations:
- Department of Electrical Engineering, IIT, Jodhpur, India
-
Author Name: Amandeep Kaur
Affiliation: Department of Electrical Engineering,
IIT, Jodhpur, India
Author URL:
https://ieeexplore.ieee.org/author/37085856535
ID: 37085856535
Order: 3
Author Affiliations:
- Department of Electrical Engineering, IIT, Jodhpur, India
Image Sensor
- sensor_type: CMOS
- resolution: Not specified
- dynamic_range: Not specified
- pixel_size: Not specified
- dark_current: Not specified
Optical Data
- focal_length: Not specified
- aperture: Not specified
- field_of_view: Not specified
- distortion: Not specified
Performance Metrics
- frame_rate: 5000 fps
- noise: Estimated error reduced from 5e-3 to 5e-7
Applications & Benefits
- cell_imaging: Not specified
-
benefits: Mitigates VFPN without extra pixel pitch and
power requirement
Supporting Organizations
-
supported_by: Biotechnology Industry Research
Assistance Council (BIRAC) - BIG
Manuscript Details
- publication_date: 19-22 Nov. 2023
Relevancy Score
- score: 9
-
missing_fields:
- resolution
- dynamic_range
- pixel_size
- dark_current
- focal_length
- aperture
- field_of_view
- distortion
- signal_to_noise_ratio
- sensitivity
- shutter_speed
- power_consumption
- cell_imaging
- benefits
Processed JSON Filename
request_21cb4f28-0b28-4b4b-81af-c0cba54c0cba-digital_background_calibration_technique_to_mitigate_vertical_fpn_in_cmos_image_sensors.json