Design And Development For Ciswlcsp Using Vertical Tsv Technology

• doi: 10.1109/ICTA50426.2020.9331982
• title: Design and Development for CIS-WLCSP Using Vertical TSV Technology
• publisher: IEEE
• isbn: 978-1-7281-8033-5
• issn:
• rank: 2092
• access_type: LOCKED
• content_type: Conferences
• abstract: Wafer-level chip scale packaging (WLCSP) using TSV technology has widely used in CMOS image sensor (CIS) products in mass production. With more IO and high reliability requirements, the new CIS-WLCSP structure using vertical TSV was developed. However, the isolation layer deposited by low-temperature PECVD suffer crack failure in strict reliability test. To solve this problem, finite element simulation tool was used for evaluation and the simulation results were verified by design of experiment. Both results showed the new design with passivation layer introduced as stress buffer layer was an effective and reliable solution for CIS-WLCSP based on vertical TSV.
• article_number: 9331982
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9331982
• html_url: https://ieeexplore.ieee.org/document/9331982/
• abstract_url: https://ieeexplore.ieee.org/document/9331982/
• publication_title: 2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)
• conference_location: Nanjing, China
• conference_dates: 23-25 Nov. 2020
• publication_number: 9331933
• is_number: 9331955
• publication_year: 2020
• publication_date: 23-25 Nov. 2020
• start_page: 119
• end_page: 120
• citing_paper_count: 0
• citing_patent_count: 0
• download_count: 363
• insert_date: 20210201
• index_terms:
  • ieee_terms:
    • Simulation
    • Semiconductor device reliability
    • Tools
    • Reliability engineering
    • Finite element analysis
    • Through-silicon vias
    • Stress
  • author_terms:
    • WLCSP
    • CMOS image sensor
    • Finite element simulation
    • TSV
  • dynamic_index_terms:
    • Simulation Results
    • Reliability Test
    • Passivation Layer
    • Surface Passivation
    • Buffer Layer
    • Crack Failure
    • Structural Design
    • Oxide Layer
    • Temperature Cycles
    • Principal Stress
    • Dry Etching
    • High Thermal Stress
• isbn_formats:
  • format: Print on Demand(PoD) ISBN, value: 978-1-7281-8033-5, isbnType: New-2005
  • format: USB ISBN, value: 978-1-7281-8031-1, isbnType: New-2005
  • format: Print ISBN, value: 978-1-7281-8030-4, isbnType: New-2005
  • format: Electronic ISBN, value: 978-1-7281-8032-8, isbnType: New-2005
• authors:
  • Author Name: Tianshen Zhou
    Affiliation: Materials Sci. & Eng., Shanghai Jiao Tong University
    Author URL: https://ieeexplore.ieee.org/author/37088511916
    ID: 37088511916
    Order: 1
    Author Affiliations:
    • Materials Sci. & Eng., Shanghai Jiao Tong University
  • Author Name: Shuying Ma
    Affiliation: Huatian Technology (Kunshan) Electronics Co., Ltd
    Author URL: https://ieeexplore.ieee.org/author/37086880080
    ID: 37086880080
    Order: 2
    Author Affiliations:
    • Huatian Technology (Kunshan) Electronics Co., Ltd
  • Author Name: Tao Hang
    Affiliation: Materials Sci. & Eng., Shanghai Jiao Tong University
    Author URL: https://ieeexplore.ieee.org/author/38101645100
    ID: 38101645100
    Order: 3
    Author Affiliations:
    • Materials Sci. & Eng., Shanghai Jiao Tong University
  • Author Name: Ming Xiang
    Affiliation: Huatian Technology (Kunshan) Electronics Co., Ltd
    Author URL: https://ieeexplore.ieee.org/author/37088660414
    ID: 37088660414
    Order: 4
    Author Affiliations:
    • Huatian Technology (Kunshan) Electronics Co., Ltd

Image Sensor

• sensor_type: CMOS
• resolution: not specified
• dynamic_range: not specified
• pixel_size: not specified
• dark_current: not specified

Optical Data

• focal_length: not specified
• aperture: not specified
• field_of_view: not specified
• distortion: not specified

Performance Metrics

Applications & Benefits

• cell_imaging: CIS technology is utilized in various applications including smartphones, medical devices, and automotive systems, though specific cell imaging details are not provided.
• benefits: Provides enhanced performance with lower power consumption and higher reliability due to the use of vertical TSV technology.

Supporting Organizations

• supported_by: Huatian Technology (Kunshan) Electronics Co., Ltd.

Manuscript Details

• publication_date: 23-25 Nov. 2020

Relevancy Score

• score: 8
• missing_fields:
  • resolution
  • dynamic_range
  • pixel_size
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • frame_rate
  • signal_to_noise_ratio
  • sensitivity
  • shutter_speed
  • power_consumption
  • noise

Processed JSON Filename

request_114f3f08-e2ca-4af3-b739-135ef26a2337-design_and_development_for_ciswlcsp_using_vertical_tsv_technology.json