Artificial Neural Networkbased Compact Model For Circuit Simulation Of A 4 Transistor Active Pixel Sensor Including Conversion Gain Prediction

• doi: 10.1109/ICEIC61013.2024.10457179
• title: Artificial Neural Network-Based Compact Model for Circuit Simulation of a 4- Transistor Active Pixel Sensor Including Conversion Gain Prediction
• publisher: IEEE
• isbn: 979-8-3503-7189-5
• issn: 2574-1403
• rank: 1681
• access_type: LOCKED
• content_type: Conferences
• abstract: This paper presents an accurate compact model to simulate a 4-transistor active pixel sensor (APS) circuit to investigate the impacts of transistor output resistances and sensing node capacitances. The compact model includes an artificial neural network-based model for the asymmetric APS transistors and an accurate capacitance model at sensing node using 3D-parasitic extraction and compositional analysis. All models are implemented in Verilog-A, and the transient characteristics for reset, integration, and readout operations of CIS are successfully reproduced in the circuit simulation. The simulation results show how the sensing node fluctuation, conversion gain, output swing, and settling time are correlated to the light intensities, parasitic capacitances of layout, and output resistances of APS transistors. This SPICE-compatible compact model provides new insights into APS circuit design and layout optimization for the state-of-the-art CMOS image sensor technologies.
• article_number: 10457179
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10457179
• html_url: https://ieeexplore.ieee.org/document/10457179/
• abstract_url: https://ieeexplore.ieee.org/document/10457179/
• publication_title: 2024 International Conference on Electronics, Information, and Communication (ICEIC)
• conference_location: Taipei, Taiwan
• conference_dates: 28-31 Jan. 2024
• publication_number: 10457047
• is_number: 10457087
• publication_year: 2024
• publication_date: 28-31 Jan. 2024
• start_page: 1
• end_page: 4
• citing_paper_count: 0
• citing_patent_count: 0
• download_count: 306
• insert_date: 20240319
• index_terms:
  • ieee_terms:
    • Semiconductor device modeling
    • Analytical models
    • Circuit simulation
    • Layout
    • CMOS image sensors
    • Predictive models
    • Capacitance
  • author_terms:
    • CMOS image sensor (CIS)
    • active pixel sensor (APS)
    • circuit simulation
    • compact model
    • parasitic extraction
    • artificial neural network
  • dynamic_index_terms:
    • Circuit Simulation
    • Compact Model
    • Neural Network-based Model
    • Conversion Gain
    • Sensor Pixel
    • Active Pixel Sensor
    • Artificial Neural Network-based Model
    • Accuracy Of Model
    • Image Sensor
    • Camera Sensor
    • Settling Time
    • Colonial Times
    • Circuit Design
    • Parasitic Capacitance
    • Output Resistance
    • Capacitance Model
    • Artificial Neural Network
    • Neural Network Model
    • Prediction Analysis
    • Transient State
    • Transient Process
    • Transient System
    • Transient Conditions
    • Transient Analysis
    • Analog-to-digital Converter
    • Analog-to-digital
    • Digital-to-analog Converter
    • Capacitive Coupling
    • AC-coupled
    • Electrostatic Coupling
    • Readout Time
    • PIN Photodiode
    • Strong Illumination
    • ANN-based Model
    • TCAD Simulation
    • Metal Interconnects
    • Output Pixel
• isbn_formats:
  • format: Print on Demand(PoD) ISBN, value: 979-8-3503-7189-5, isbnType: New-2005
  • format: Electronic ISBN, value: 979-8-3503-7188-8, isbnType: New-2005
• authors:
  • Author Name: Yohan Kim
    Affiliation: Department of Semiconductor and Display Engineering, College of Information and Communication Engineering, Sungkyunkwan University, Suwon, South Korea
    Author URL: https://ieeexplore.ieee.org/author/37089396244
    ID: 37089396244
    Order: 1
    Author Affiliations:
    • Department of Semiconductor and Display Engineering, College of Information and Communication Engineering, Sungkyunkwan University, Suwon, South Korea
    • Computational Science and Engineering Team, Samsung Electronics, Suwon, South Korea
  • Author Name: SoYoung Kim
    Affiliation: College of Information and Communication Engineering, Sungkyunkwan University, Suwon, South Korea
    Author URL: https://ieeexplore.ieee.org/author/38183936900
    ID: 38183936900
    Order: 2
    Author Affiliations:
    • College of Information and Communication Engineering, Sungkyunkwan University, Suwon, South Korea

Image Sensor

• sensor_type: CMOS
• resolution: 2x2 array in BGGR Bayer pattern
• dynamic_range: Not specified
• pixel_size: Not specified
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

• frame_rate: Over 100 fps

Applications & Benefits

• cell_imaging: CMOS image sensors used in mobile applications for digital imaging.
• benefits: Enhanced imaging for smartphones, medical devices, and automotive systems.

Supporting Organizations

• supported_by: National Research Foundation of Korea (NRF), IC Design Education Center (IDEC)

Manuscript Details

• publication_date: 28-31 Jan. 2024

Relevancy Score

• score: 10
• missing_fields:
  • pixel_size
  • dynamic_range
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • signal_to_noise_ratio
  • sensitivity
  • shutter_speed
  • power_consumption
  • noise

Processed JSON Filename

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