A Smallarea And Energyefficient 12Bit Saadc With Residue Sampling And Digital Calibration For Cmos Image Sensors

• doi: 10.1109/TCSII.2015.2457812
• title: A Small-Area and Energy-Efficient 12-bit SA-ADC With Residue Sampling and Digital Calibration for CMOS Image Sensors
• publisher: IEEE
• isbn:
• issn: 1558-3791
• rank: 922
• access_type: LOCKED
• content_type: Journals
• abstract: This brief proposes a small-area and energy-efficient 12-bit successive approximation analog-to-digital converter (SA-ADC) for CMOS image sensors with a column-parallel readout structure. The proposed SA-ADC, which uses only a 6-bit capacitor digital-to-analog converter (DAC) for residue sampling, reduces the capacitor area to 1/64th of that for the 12-bit capacitor DAC and adopts the scaled reference voltages for 12-bit conversion. It also achieves 88% lower switching energy of the capacitor DAC compared with the 12-bit SA-ADC with split capacitor structure. A foreground digital calibration is employed to compensate for the linearity error caused by the inaccurately scaled reference voltages. A test chip, which has 100 readout channels with the proposed SA-ADC, is fabricated using a 0.18-μm CMOS process. The measurement results show that the proposed SA-ADC with the proposed digital calibration has differential nonlinearity (DNL) of -0.8/+1.7 LSB and integral nonlinearity (INL) of -2.3/+2.4 LSB, and without the calibration, it has DNL of -1/+14.9 LSB and INL of -15.8/+12.7 LSB. In addition, a digital correlated double sampling method improves the standard deviation of the readout channel outputs from 62.1 to 1.4 LSB.
• article_number: 7161297
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7161297
• html_url: https://ieeexplore.ieee.org/document/7161297/
• abstract_url: https://ieeexplore.ieee.org/document/7161297/
• publication_title: IEEE Transactions on Circuits and Systems II: Express Briefs
• conference_location:
• conference_dates:
• publication_number: 8920
• is_number: 7277159
• publication_year: 2015
• publication_date: Oct. 2015
• start_page: 932
• end_page: 936
• citing_paper_count: 6
• citing_patent_count: 0
• download_count: 1257
• insert_date: 20150717
• index_terms:
  • ieee_terms:
    • Capacitors
    • Calibration
    • Voltage control
    • Linearity
    • Switches
    • Semiconductor device measurement
    • Circuits and systems
  • author_terms:
    • CMOS image sensor
    • column-parallel readout
    • foreground digital calibration
    • successive approximation ADC
    • CMOS image sensor (CIS)
    • column-parallel readout
    • foreground digital calibration
    • successive approximation analog-to-digital converter (SA-ADC)
  • dynamic_index_terms:
    • Residual Samples
    • Residues In Samples
    • Digital Calibration
    • Successive-approximation Analog-to-digital Converter
    • Sampling Method
    • Analog-to-digital Converter
    • Analog-to-digital
    • Digital-to-analog Converter
    • Linear Error
    • CMOS Process
    • Switching Energy
    • Test Chip
    • Power Consumption
    • Fast Fourier Transform
    • Inverse Fast Fourier Transform
    • Figure Of Merit
    • Low Conversion
    • Least Significant Bit
    • Low Bit
    • Metal-insulator-metal
    • Metal Insulator
    • Conversion Step
    • Number Of Capacitors
• authors:
  • Author Name: Min-Kyu Kim
    Affiliation: Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea
    Author URL: https://ieeexplore.ieee.org/author/37349829800
    ID: 37349829800
    Order: 1
    Author Affiliations:
    • Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea
  • Author Name: Seong-Kwan Hong
    Affiliation: Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea
    Author URL: https://ieeexplore.ieee.org/author/37085359277
    ID: 37085359277
    Order: 2
    Author Affiliations:
    • Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea
  • Author Name: Oh-Kyong Kwon
    Affiliation: Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea
    Author URL: https://ieeexplore.ieee.org/author/37276791400
    ID: 37276791400
    Order: 3
    Author Affiliations:
    • Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea

Image Sensor

• sensor_type: CMOS
• resolution: not specified in the text
• dynamic_range: not specified in the text
• pixel_size: not specified in the text
• dark_current: not specified in the text

Optical Data

• focal_length: not specified in the text
• aperture: not specified in the text
• field_of_view: not specified in the text
• distortion: not specified in the text

Performance Metrics

• frame_rate: not specified in the text
• signal_to_noise_ratio: not specified in the text
• sensitivity: not specified in the text
• shutter_speed: not specified in the text
• power_consumption: 14.4 μW
• noise: 112.2 μV (input-referred noise)

Applications & Benefits

• cell_imaging: not specified in the text
• benefits: suitable for high-speed high-frame CMOS image sensors with column-parallel readout structure.

Supporting Organizations

• supported_by: SK Hynix Semiconductor Inc.

Manuscript Details

• publication_date: Oct. 2015

Relevancy Score

• score: 8
• missing_fields:
  • resolution
  • dynamic_range
  • pixel_size
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • frame_rate
  • signal_to_noise_ratio
  • sensitivity
  • shutter_speed
  • noise

Processed JSON Filename

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