A Highspeed Cmos Image Sensor With Onchip Parallel Image Compression Circuits

• doi: 10.1109/CICC.2007.4405857
• title: A High-Speed CMOS Image Sensor with On-chip Parallel Image Compression Circuits
• publisher: IEEE
• isbn: 978-1-4244-1623-3
• issn: 2152-3630
• partnum: 07CH37853
• rank: 753
• access_type: LOCKED
• content_type: Conferences
• abstract: This paper presents a high-speed CMOS image sensor with on-chip parallel image compression circuits. The chip consists of a pixel array, an A/D converter array with noise canceling function and an image compression processing element array and buffer memories. The image compression processing element is implemented with a 4×4 point Discreate Cosine Transform(DCT) and a modified zigzag scanner with 4 blocks. A prototype high-speed CMOS image sensor integrating the image compression circuits is implemented based on 1-poly 5-metal 0.25-μm CMOS technology. Image encoding using the implemented parallel image compression circuits to the image captured by the high-speed image sensor is successfully performed at 3,000[frame/s].
• article_number: 4405857
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4405857
• html_url: https://ieeexplore.ieee.org/document/4405857/
• abstract_url: https://ieeexplore.ieee.org/document/4405857/
• publication_title: 2007 IEEE Custom Integrated Circuits Conference
• conference_location: San Jose, CA, USA
• conference_dates: 16-19 Sept. 2007
• publication_number: 4405666
• is_number: 4405667
• publication_year: 2007
• publication_date: 16-19 Sept. 2007
• start_page: 833
• end_page: 836
• citing_paper_count: 19
• citing_patent_count: 4
• download_count: 1605
• insert_date: 20080121
• index_terms:
  • ieee_terms:
    • CMOS image sensors
    • Image coding
    • CMOS technology
    • Pixel
    • Image converters
    • Circuit noise
    • Noise cancellation
    • Prototypes
    • CMOS memory circuits
    • Image sensors
  • dynamic_index_terms:
    • Image Sensor
    • Camera Sensor
    • High-speed Imaging
    • Image Compression
    • High-speed CMOS
    • Imaging Buffer
    • Source Code
    • Data Compression
    • High-speed Camera
    • Peak Signal-to-noise Ratio
    • PSNR
    • Codeword
    • Compression Ratio
    • OR Operation
    • Logical OR
    • Boolean OR
    • Coding Efficiency
    • Digital Sensor
    • Small Circuit
    • Parallel Output
• isbn_formats:
  • format: CD, value: 978-1-4244-1623-3, isbnType: New-2005
  • format: Print ISBN, value: 978-1-4244-0786-6, isbnType: New-2005
• authors:
  • Author Name: Yukinari Nishikawa
    Affiliation: Graduate School of Electronics Science, Technology Shizuoka University, Naka, Japan
    Author URL: https://ieeexplore.ieee.org/author/37299218500
    ID: 37299218500
    Order: 1
    Author Affiliations:
    • Graduate School of Electronics Science, Technology Shizuoka University, Naka, Japan
  • Author Name: Shoji Kawahito
    Affiliation: Research Institute of Electronics, Shizuoka University, Naka, Japan
    Author URL: https://ieeexplore.ieee.org/author/37300195700
    ID: 37300195700
    Order: 2
    Author Affiliations:
    • Research Institute of Electronics, Shizuoka University, Naka, Japan
  • Author Name: Masanori Furuta
    Affiliation: Research Institute of Electronics, Shizuoka University, Naka, Japan
    Author URL: https://ieeexplore.ieee.org/author/37300195000
    ID: 37300195000
    Order: 3
    Author Affiliations:
    • Research Institute of Electronics, Shizuoka University, Naka, Japan
  • Author Name: Toshihiro Tamura
    Affiliation: Photron Limited, Chiyoda, Tokyo, Japan
    Author URL: https://ieeexplore.ieee.org/author/37823231900
    ID: 37823231900
    Order: 4
    Author Affiliations:
    • Photron Limited, Chiyoda, Tokyo, Japan

Image Sensor

• sensor_type: CMOS
• resolution: 256x256 pixels
• dynamic_range: Not specified
• pixel_size: 15x15 µm
• dark_current: Not specified

Optical Data

• focal_length: Not specified
• aperture: Not specified
• field_of_view: Not specified
• distortion: Not specified

Performance Metrics

• frame_rate: 3000 fps

Applications & Benefits

• cell_imaging: Not specified
• benefits: Reduced hardware complexity, high-speed image capture, ability to perform on-chip processing with image compression.

Supporting Organizations

• supported_by: Shizuoka University, Photron Ltd.

Manuscript Details

• publication_date: 16-19 Sept. 2007

Relevancy Score

• score: 9
• missing_fields:
  • dynamic_range
  • dark_current
  • focal_length
  • aperture
  • field_of_view
  • distortion
  • signal_to_noise_ratio
  • sensitivity
  • shutter_speed
  • power_consumption
  • noise
  • cell_imaging

Processed JSON Filename

request_aecdcba0-e1a7-4ff3-8c59-311f039e76cb-a_highspeed_cmos_image_sensor_with_onchip_parallel_image_compression_circuits.json