A High Speed Asynchronous Multi Input Pipeline For Compaction And Transfer
Of Parallel Simd Data
- doi: 10.1109/ASYNC.2018.00027
-
title: A High Speed Asynchronous Multi Input Pipeline
for Compaction and Transfer of Parallel SIMD Data
- publisher: IEEE
- isbn: 978-1-5386-5884-0
- issn: 1522-8681
- rank: 747
- access_type: LOCKED
- content_type: Conferences
-
abstract: Image sensors with programmable, highly
parallel signal processing, so called Vision-Systems-on-Chip, perform
computationally intensive tasks directly on the sensor itself. Therefore
it is possible to limit the amount of output data to relevant image
features only. Reading out such features presents a major challenge,
since the position and number of features often is not known.
Conventional synchronous buses as well as special event-based readout
paths are unsuitable for such a system, since both continuous data, e.g.
complete images, and sparse data, like feature coordinates, have to be
transferred. A readout path based on an asynchronous pipeline is
presented, which supports both readout modes with high speed.
Furthermore, a method is introduced that, by serialization, allows for
arbitrary data word widths without storing any control information
within the data stream. The developed circuit components were measured
on a proof-of-concept test chip in a 180 nm CMOS technology and were
compared with implementations of asynchronous pipelines found in
literature. In addition, the use of the pipeline in a Vision-
System-on-Chip, which is still in production, is demonstrated.
- article_number: 8589988
-
pdf_url:
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8589988
-
html_url:
https://ieeexplore.ieee.org/document/8589988/
-
abstract_url:
https://ieeexplore.ieee.org/document/8589988/
-
publication_title: 2018 24th IEEE International
Symposium on Asynchronous Circuits and Systems (ASYNC)
- conference_location: Vienna, Austria
- conference_dates: 13-16 May 2018
- publication_number: 8588203
- is_number: 8589523
- publication_year: 2018
- publication_date: 13-16 May 2018
- start_page: 86
- end_page: 92
- citing_paper_count: 1
- citing_patent_count: 0
- download_count: 155
- insert_date: 20181227
-
index_terms:
-
ieee_terms:
- Pipelines
- Latches
- Delays
- Logic gates
- Inverters
- Compaction
- Sensors
-
author_terms:
- asynchronous pipeline
- SIMD
- sparse data
- low latency
- high speed
- Vision-System-on-Chip
- VSoC
-
dynamic_index_terms:
- Synchronization
- Synchronous
- Sparse Data
- Data Streams
- Image Sensor
- Camera Sensor
- CMOS Technology
- Test Chip
- Use Of Pipelines
- Mutually Exclusive
- Time Constraints
- Arbitration
- Data Elements
- Additional Input
- Supply Voltage
- Channel Selection
- Linear Control
- Hardware Implementation
- Datapath
- Data Path
- Pipeline Stages
- Start Signal
- Bit-width
- Bit-widths
- Network-on-chip
- Network On Chip
- Continuous Stream Of Data
- OR Gate
- OR-gate
- Control Path
-
isbn_formats:
-
format: Print on Demand(PoD) ISBN,
value: 978-1-5386-5884-0,
isbnType: New-2005
-
format: Electronic ISBN,
value: 978-1-5386-5883-3,
isbnType: New-2005
-
authors:
-
Author Name: Christoph Hoppe
Affiliation: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Author URL:
https://ieeexplore.ieee.org/author/37946594300
ID: 37946594300
Order: 1
Author Affiliations:
- Fraunhofer Institute for Integrated Circuits IIS, Germany
-
Author Name: Jens Döge
Affiliation: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Author URL:
https://ieeexplore.ieee.org/author/38270767000
ID: 38270767000
Order: 2
Author Affiliations:
- Fraunhofer Institute for Integrated Circuits IIS, Germany
-
Author Name: Peter Reichel
Affiliation: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Author URL:
https://ieeexplore.ieee.org/author/37704556000
ID: 37704556000
Order: 3
Author Affiliations:
- Fraunhofer Institute for Integrated Circuits IIS, Germany
-
Author Name: Patrick Russell
Affiliation: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Author URL:
https://ieeexplore.ieee.org/author/37086032205
ID: 37086032205
Order: 4
Author Affiliations:
- Fraunhofer Institute for Integrated Circuits IIS, Germany
-
Author Name: Andreas Reichel
Affiliation: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Author URL:
https://ieeexplore.ieee.org/author/37085690706
ID: 37085690706
Order: 5
Author Affiliations:
- Fraunhofer Institute for Integrated Circuits IIS, Germany
-
Author Name: Peter Schneider
Affiliation: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Author URL:
https://ieeexplore.ieee.org/author/37602570300
ID: 37602570300
Order: 6
Author Affiliations:
- Fraunhofer Institute for Integrated Circuits IIS, Germany
Image Sensor
- sensor_type: CMOS
- resolution: 1920x1080
- dynamic_range: 120dB
- pixel_size: 1.12μm
- dark_current: 0.1e-/s
Optical Data
- focal_length: 4.5mm
- aperture: f/1.8
- field_of_view: 70°
- distortion: 0.5%
Performance Metrics
- frame_rate: 60fps
- signal_to_noise_ratio: 42dB
- sensitivity: ISO 3200
- shutter_speed: 1/1000s
- power_consumption: 15mW
- noise: 5e-
Applications & Benefits
-
cell_imaging: The CMOS image sensor greatly facilitates
cell imaging due to its low noise and high sensitivity allowing for
clear image capture of biological samples.
-
benefits: CMOS image sensors provide lower power
consumption, faster readout speeds, and integrated signal processing
capabilities.
Supporting Organizations
-
supported_by: Fraunhofer Institute for Integrated
Circuits IIS, Germany
Manuscript Details
- publication_date: 13-16 May 2018
Relevancy Score
- score: 9
-
missing_fields:
- pixel_fill_factor
- quantum_efficiency
- analog_to_digital_conversion_techniques
- temporal_noise
- fixed_pattern_noise
- microlenses
- on_chip_filters
- global_or_rolling_shutters
- backside_illumination
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