A Hardware Architecture For Cellbased Featureextraction And Classification
Using Dualfeature Space
- doi: 10.1109/TCSVT.2017.2726564
-
title: A Hardware Architecture for Cell-Based
Feature-Extraction and Classification Using Dual-Feature Space
- publisher: IEEE
- isbn:
- issn: 1558-2205
- rank: 736
- access_type: LOCKED
- content_type: Journals
-
abstract: Many computer-vision and machine-learning
applications in robotics, mobile, wearable devices, and automotive
domains are constrained by their real-time performance requirements.
This paper reports a dual-feature-based object recognition coprocessor
that exploits both histogram of oriented gradient (HOG) and Haar-like
descriptors with a cell-based parallel sliding-window recognition
mechanism. The feature extraction circuitry for HOG and Haar-like
descriptors is implemented by a pixel-based pipelined architecture,
which synchronizes to the pixel frequency from the image sensor. After
extracting each cell feature vector, a cell-based sliding window scheme
enables parallelized recognition for all windows, which contain this
cell. The nearest neighbor search classifier is, respectively, applied
to the HOG and Haar-like feature space. The complementary aspects of the
two feature domains enable a hardware-friendly implementation of the
binary classification for pedestrian detection with improved accuracy. A
proof-of-concept prototype chip fabricated in a 65-nm SOI CMOS, having
thin gate oxide and buried oxide layers (SOTB CMOS), with 3.22-mm2 core
area achieves an energy efficiency of 1.52 nJ/pixel and a processing
speed of 30 fps for 1024 × 1616-pixel image frames at 200-MHz
recognition working frequency and 1-V supply voltage. Furthermore,
multiple chips can implement image scaling, since the designed chip has
image-size flexibility attributable to the pixel-based architecture.
- article_number: 7979565
-
pdf_url:
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7979565
-
html_url:
https://ieeexplore.ieee.org/document/7979565/
-
abstract_url:
https://ieeexplore.ieee.org/document/7979565/
-
publication_title: IEEE Transactions on Circuits and
Systems for Video Technology
- conference_location:
- conference_dates:
- publication_number: 76
- is_number: 8506638
- publication_year: 2018
- publication_date: Oct. 2018
- start_page: 3086
- end_page: 3098
- citing_paper_count: 9
- citing_patent_count: 0
- download_count: 522
- insert_date: 20170713
-
index_terms:
-
ieee_terms:
- Feature extraction
- Computer architecture
- Histograms
- Training
- Microprocessors
- Prototypes
-
author_terms:
- Dual feature
- HOG
- Haar-like
- pixel-based pipeline
- cell-based recognition
- complementary classifier
-
dynamic_index_terms:
- Hardware Architecture
- Energy Efficiency
- Feature Space
- Parallelization
- Parallel Computing
- Image Sensor
- Camera Sensor
- Image Frames
- Nearest Neighbor Search
- Nearest Neighbor Method
- Nearest Neighbour Method
- Working Frequency
- Histogram Of Oriented Gradients
- Pedestrian Detection
- Coprocessor
- Multiple Chips
- Support Vector Machine
- Positive Samples
- Horizontal Plane
- Horizontal Direction
- Horizontal Distance
- Window Size
- Input Image
- Negative Samples
- Image Object
- Intermediate Results
- Intermediate Outcomes
- Dual Character
- Dual Feature
- Integral Image
- Positive Training
- Hardware Implementation
- Scale-invariant Feature Transform
- Scale Invariant Feature Transform
- Clock Cycles
- Negative Images
- Positive Image
- Human Figure
- Regeneration Buffer
- Framebuffer
- Frame Buffer
- Display Memory
-
authors:
-
Author Name: Fengwei An
Affiliation: Institute of Engineering, Hiroshima
University, Higashi-Hiroshima, Japan
Author URL:
https://ieeexplore.ieee.org/author/38235502500
ID: 38235502500
Order: 1
Author Affiliations:
-
Institute of Engineering, Hiroshima University,
Higashi-Hiroshima, Japan
-
Author Name: Xiangyu Zhang
Affiliation: Graduate School of Engineering,
Hiroshima University, Higashi-Hiroshima, Japan
Author URL:
https://ieeexplore.ieee.org/author/37085836690
ID: 37085836690
Order: 2
Author Affiliations:
-
Graduate School of Engineering, Hiroshima University,
Higashi-Hiroshima, Japan
-
Author Name: Aiwen Luo
Affiliation: Graduate School of Advanced Sciences
of Matter, Hiroshima University, Higashi-Hiroshima, Japan
Author URL:
https://ieeexplore.ieee.org/author/37086102073
ID: 37086102073
Order: 3
Author Affiliations:
-
Graduate School of Advanced Sciences of Matter, Hiroshima
University, Higashi-Hiroshima, Japan
-
Author Name: Lei Chen
Affiliation: HiSIM Research Center, Hiroshima
University, Higashi-Hiroshima, Japan
Author URL:
https://ieeexplore.ieee.org/author/37085589660
ID: 37085589660
Order: 4
Author Affiliations:
-
HiSIM Research Center, Hiroshima University, Higashi-Hiroshima,
Japan
-
Author Name: Hans Jürgen Mattausch
Affiliation: Research Institute for Nanodevice and
Bio Systems, Hiroshima University, Higashi-Hiroshima, Japan
Author URL:
https://ieeexplore.ieee.org/author/37269154600
ID: 37269154600
Order: 5
Author Affiliations:
-
Research Institute for Nanodevice and Bio Systems, Hiroshima
University, Higashi-Hiroshima, Japan
Image Sensor
- sensor_type: CMOS
- resolution: 1024x1616
- dynamic_range: Not specified
- pixel_size: Not specified
- dark_current: Not specified
Optical Data
- focal_length: Not specified
- aperture: Not specified
- field_of_view: Not specified
- distortion: Not specified
Performance Metrics
- frame_rate: 30 fps
- power_consumption: 75.48 mW
Applications & Benefits
-
cell_imaging: Used for pedestrian detection and object
recognition in robotics, automotive systems, and security systems.
-
benefits: High energy efficiency (1.52 nJ/pixel),
real-time processing capabilities, flexibility in image resolutions.
Supporting Organizations
-
supported_by: Hiroshima University TAOYAKA Program,
Ministry of Education, Culture, Sports, Science and Technology (Japan)
Manuscript Details
- publication_date: Oct. 2018
Relevancy Score
- score: 9
-
missing_fields:
- fill factor
- quantum efficiency
- readout speed
- temporal noise
- fixed-pattern noise
- analog-to-digital conversion techniques
- use of microlenses
- on-chip colour filters
- global or rolling shutters
- backside illumination
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