A Generalpurpose Processorperpixel Analog Simd Vision Chip

• doi: 10.1109/TCSI.2004.840093
• title: A general-purpose processor-per-pixel analog SIMD vision chip
• publisher: IEEE
• isbn:
• issn: 1558-0806
• rank: 1068
• access_type: LOCKED
• content_type: Journals
• abstract: A smart-sensor VLSI circuit suitable for focal-plane low-level image processing applications is presented. The architecture of the device is based on a fine-grain software-programmable SIMD processor array. Processing elements, integrated within each pixel of the imager, are implemented utilising a switched-current analog microprocessor concept. This allows the achievement of real-time image processing speeds with high efficiency in terms of silicon area and power dissipation. The prototype 21 /spl times/ 21 vision chip is fabricated in a 0.6 /spl mu/m CMOS technology and achieves a cell size of 98.6 /spl mu/m /spl times/ 98.6 /spl mu/m. It executes over 1.1 giga instructions per second (GIPS) while dissipating under 40 mW of power. The architecture, circuit design and experimental results are presented in this paper.
• article_number: 1377538
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1377538
• html_url: https://ieeexplore.ieee.org/document/1377538/
• abstract_url: https://ieeexplore.ieee.org/document/1377538/
• publication_title: IEEE Transactions on Circuits and Systems I: Regular Papers
• conference_location:
• conference_dates:
• publication_number: 8919
• is_number: 30068
• publication_year: 2005
• publication_date: Jan. 2005
• start_page: 13
• end_page: 20
• citing_paper_count: 120
• citing_patent_count: 10
• download_count: 1012
• insert_date: 20050110
• index_terms:
  • ieee_terms:
    • Image processing
    • CMOS technology
    • Very large scale integration
    • Circuits
    • Application software
    • Pixel
    • Microprocessors
    • Silicon
    • Power dissipation
    • Software prototyping
  • author_terms:
    • Analog processor array
    • CMOS imager
    • smart sensor
    • vision chip
  • dynamic_index_terms:
    • Vision Chips
    • Image Processing
    • Real-time Performance
    • Real-time Processing
    • Real-time Operation
    • Processing Elements
    • Circuit Design
    • Device Architecture
    • Low-level Processing
    • Lower-level Processes
    • CMOS Technology
    • Silicon Area
    • Cell Area
    • Performance Accuracy
    • General Purpose
    • General Aim
    • Analog-to-digital Converter
    • Analog-to-digital
    • Digital-to-analog Converter
    • Binary Image
    • Edge Detection
    • Random Access
    • Arithmetic Operations
    • Basic Arithmetic
    • Image Processing Algorithms
    • Hardware Resources
    • Digital Analog
    • Single Instruction
    • Column Array
    • Clock Cycles
    • Special Register
    • Computer Vision Applications
    • Mode Of Integration
    • Entire Array
    • Digital Computer
    • Algorithm Execution
• authors:
  • Author Name: P. Dudek
    Affiliation: Department of Electrical Engineering and Electronics, University of Manchester, Institute of Science and Technology, Manchester, UK
    Author URL: https://ieeexplore.ieee.org/author/37266405800
    ID: 37266405800
    Order: 1
    Author Affiliations:
    • Department of Electrical Engineering and Electronics, University of Manchester, Institute of Science and Technology, Manchester, UK
  • Author Name: P.J. Hicks
    Affiliation: Department of Electrical Engineering and Electronics, University of Manchester, Institute of Science and Technology, Manchester, UK
    Author URL: https://ieeexplore.ieee.org/author/37283059200
    ID: 37283059200
    Order: 2
    Author Affiliations:
    • Department of Electrical Engineering and Electronics, University of Manchester, Institute of Science and Technology, Manchester, UK

Image Sensor

• sensor_type: CMOS
• resolution: 21x21
• dynamic_range: Not specified in the text
• pixel_size: 0.6µm
• dark_current: Not specified in the text

Optical Data

• focal_length: Not specified in the text
• aperture: Not specified in the text
• field_of_view: Not specified in the text
• distortion: Not specified in the text

Performance Metrics

• frame_rate: 25 fps
• signal_to_noise_ratio: 1% rms fixed pattern noise with FPN reduction
• sensitivity: 820µm photodetector area with a fill factor of 8.4%
• shutter_speed: Integration mode with current readout
• power_consumption: Under 40mW per chip; 13nW per APE during processing in real-time applications.
• noise: 0.5% systematic error with 8.5nA rms random noise

Applications & Benefits

• cell_imaging: Supports focal-plane low-level image processing tasks such as filtering, edge detection, and feature extraction.
• benefits: Real-time image processing speeds with high efficiency in terms of silicon area and power dissipation.

Supporting Organizations

• supported_by: U.K. Engineering and Physical Sciences Research Council (EPSRC) under Grant GR/R52688/01.

Manuscript Details

• publication_date: Jan. 2005

Relevancy Score

• score: 10
• missing_fields:
  • quantum_efficiency
  • readout_speed
  • noise_sources
  • analog_to_digital_conversion_techniques
  • microlenses
  • on_chip_colour_filters
  • global_or_rolling_shutters
  • backside_illumination

Processed JSON Filename

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