A 1 Mu S Ramp Time 12Bit Columnparallel Flash Tdcinterpolated Singleslope Adc With Digital Delayelement Calibration

• doi: 10.1109/TCSI.2018.2846592
• title: A 1- $\mu$ s Ramp Time 12-bit Column-Parallel Flash TDC-Interpolated Single-Slope ADC With Digital Delay-Element Calibration
• publisher: IEEE
• isbn:
• issn: 1558-0806
• rank: 190
• access_type: LOCKED
• content_type: Journals
• abstract: This work presents a hybrid column-parallel time-to-digital-converter interpolated (TDC) single-slope (SS) ADC with a digital delay element feedback. The proposed scheme solves the multiphase clock period matching problem in flash TDC-interpolation of SS ADCs without the use of a delay-locked-loop. The architecture employs open-loop delay elements for multiphase clock generation forming a lowered TDC radix of c2 adding redundancy and providing ability for gain calibration using a per-column digital multiplication operation. The presented digital feedback correction scheme is applied online and in-column after the end of each conversion, occupying less than 5% of the ramp time. The architecture is verified on a 1024 × 128 linescan image sensor testchip manufactured in a 0.13-μm 1P3M CMOS process. The ADC operates at 250 MHz and achieves a 1-μs ramp time and 4.4-μs digital correlated double sampling row time for a 12-bit linear A/D conversion.
• article_number: 8395156
• pdf_url: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8395156
• html_url: https://ieeexplore.ieee.org/document/8395156/
• abstract_url: https://ieeexplore.ieee.org/document/8395156/
• publication_title: IEEE Transactions on Circuits and Systems I: Regular Papers
• conference_location:
• conference_dates:
• publication_number: 8919
• is_number: 8566198
• publication_year: 2019
• publication_date: Jan. 2019
• start_page: 54
• end_page: 67
• citing_paper_count: 28
• citing_patent_count: 0
• download_count: 3190
• insert_date: 20180625
• index_terms:
  • ieee_terms:
    • Clocks
    • Delays
    • Interpolation
    • Quantization (signal)
    • Calibration
    • Redundancy
    • Linearity
  • author_terms:
    • Column-parallel analog-to-digital converter
    • ADC
    • single-slope
    • ramp
    • time-to-digital converter
    • TDC
    • error calibration
    • CMOS image sensor
    • TDC latch
    • code redundancy
    • fixed-point multiplication
  • dynamic_index_terms:
    • Image Sensor
    • Camera Sensor
    • CMOS Process
    • Clock Period
    • Clock Periods
    • Clock Generator
    • Feedback Loop
    • Power Consumption
    • First Approximation
    • First-order Approximation
    • Duty Cycle
    • Inverter
    • Reference Line
    • Voltage Variation
    • Propagation Delay
    • Delay Line
    • Power Cost
    • Correction Coefficient
    • Multiple Coefficient
    • Clock Cycles
    • Processing Nodes
    • Gate Capacitance
    • Interpolation Points
    • Clock Phase
    • Differential Pair
    • Numerical Noise
    • Numerous Noise
• authors:
  • Author Name: Deyan Levski
    Affiliation: Department of Engineering Science, University of Oxford, Oxford, U.K.
    Author URL: https://ieeexplore.ieee.org/author/37086061321
    ID: 37086061321
    Order: 1
    Author Affiliations:
    • Department of Engineering Science, University of Oxford, Oxford, U.K.
  • Author Name: Martin Wäny
    Affiliation: Austria Microsystems A.G., Madeira Tecnopolo, Funchal, Portugal
    Author URL: https://ieeexplore.ieee.org/author/38136964600
    ID: 38136964600
    Order: 2
    Author Affiliations:
    • Austria Microsystems A.G., Madeira Tecnopolo, Funchal, Portugal
  • Author Name: Bhaskar Choubey
    Affiliation: University of Oxford, Oxford, U.K.
    Author URL: https://ieeexplore.ieee.org/author/37274571900
    ID: 37274571900
    Order: 3
    Author Affiliations:
    • University of Oxford, Oxford, U.K.

Image Sensor

• sensor_type: CMOS
• resolution: 1024 x 128
• dynamic_range: approximately 328 DN at 1 μs ramp time mode
• pixel_size: 5.6 µm
• dark_current: not specified in the text

Optical Data

• focal_length: not specified
• aperture: not specified
• field_of_view: not specified
• distortion: not specified

Performance Metrics

• frame_rate: 250 MHz
• signal_to_noise_ratio: 477 µV input-referred noise
• shutter_speed: 1 μs ramp time
• power_consumption: ≈177 µW per column
• noise: 477 µV input-referred noise

Applications & Benefits

• cell_imaging: used in CMOS image sensors to enable digital imaging.
• benefits: High-speed operation with low power consumption and improved noise performance.

Supporting Organizations

• supported_by: EU FP7 Marie Curie Programme and project EDISON-GA under Grant 317497.

Manuscript Details

• publication_date: Jan. 2019

Relevancy Score

• score: 10

Processed JSON Filename

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